s Architecture
Fast Interrupt Response and Processing
Unified Memory Programming Model
Code-Efficient (in C/C++ and Assembly)
Six Channel DMA Controller (for ADC, McBSP, ePWM, XINTF, and SARAM)
16-bitor32-bit External Interface (XINTF)
Over 2M x 16 Address Reach
On-Chip Memory
F28335/F28235: 256K x 16 Flash, 34K x 16 SARAM
F28334/F28234: 128K x 16 Flash, 34K x 16 SARAM
F28332/F28232: 64K x 16 Flash,